DDR SDRAM

Power Integrity Simulation and its Application Research in DDR SDRAM Circuit

电源完整性仿真及其在DDRSDRAM电路中的应用研究

Simulation and Design of DDR SDRAM Data Bus Layout in Mobile Terminals

移动终端DDRSDRAM数据总线布线仿真与设计

Design of the DDR SDRAM Controller Integrated by the Data Intensive Computing Architecture

计算密集型体系集成DDRSDRAM控制器设计

Power Integrity Research of DDR SDRAM Control Circuit

DDRSDRAM控制电路电源完整性研究

The Memory chip is DDR SDRAM memory type chip .

内存芯片的DDRSDRAM内存芯片的类型。

DDR SDRAM memory bank is used as the mass buffer in some applications .

本处理板中还加入了一个DDRSDRAM内存条，主要是考虑到实际应用中可能需要大容量缓存。

In application where high speed and huge capacity memory is needed , DDR SDRAM is broadly used .

在要求高速大容量的存储器系统中，DDRSDRAM得到了广泛的应用。

It is used to store data and programs , and called " DDR SDRAM " .

它被用来存放数据和程序，因此俗称内存。

Design of DDR SDRAM Controller in Video Decoder

视频解码芯片中DDRSDRAM控制器的设计

The Design and Implementation of DDR SDRAM Controller Data-path

DDRSDRAM控制器数据通道的设计与实现

Consider bandwidth requirement and system cost , choose DDR SDRAM as extern memory in this video decoder .

本设计考虑到系统对带宽的要求和成本问题，选用DDRSDRAM作为外存。

Compared with the DDR SDRAM , DDR2 SDRAM has higher speed , lower power , higher efficiency and higher stability .

作为第2代DDR存储器的DDR2SDRAM具有高速、低功耗、高密度、高稳定性等特点，在未来的一二年里，它将逐步取代DDRSDRAM而成为内存的主流。

And then it presents a novel memory controlling architecture with DDR SDRAM according to the characteristics of the modern DRAM storage devices .

然后，结合现代DRAM存储设备的特点，提出了一种以DDRSDRAM为存储设备的新的内存控制器的结构。

Furthermore , the display controller based on FPGA , and the storage for display with DDR SDRAM are accomplished including technical details .

此外，还完成了基于FPGA的显示控制器的设计和DDRSDRAM的显示存储器的应用，并详细给出了设计要点。

However , DDR SDRAM and the peripherals need a bridge in between , and DDR SDRAM controller can play this important role .

而DDRSDRAM和外设间需要一个桥梁，DDRSDRAM控制器正是起着这一重要的作用，所以研究设计DDRSDRAM控制器的设计有着极其重要的价值和意义。

As the updated version of the SDRAM , DDR SDRAM ( Double Data Rate Synchronous Dynamic Ram ) shows its excellent performance in high-bandwidth solutions .

DDRSDRAM（双倍速同步动态随机存储器）作为SDRAM的升级版本，在高带宽解决方案中显示了它出色的性能。

In this paper , an address mapping method for multi-standard video is presented , which maps video picture into the memory space of DDR SDRAM with a simple formula .

提出了一种支持多标准视频的存储器地址映射方法，用一个简洁的公式把视频图像映射到DDRSDRAM的存储空间。

According to the requirement of the whole system and the characteristic of DDR SDRAM , the paper presents the optimized solution in structure and timing aspect . Implementation of DDR SDRAM Controller Based on FPGA

根据DDR的工作原理和系统带宽要求，给出了DDR控制器关键部分在结构上和时序上的优化方案。一种DDRSDRAM控制器设计

In order to meet the requirement of high-capacity and high-speed storage medium in electronics , DDR SDRAM has been used more and more , and it needs better interface and more convenient way to use .

为了满足现代电子领域对于大容量、高速度存储介质的需要，DDRSDRAM存储介质需要更完善的接口控制模块和更便利的使用方式。

Features of DDR SDRAM , basic configuration and timing of DDR controller , together with basic configuration and timing of PCI bus , are discussed first , while basic theory and development process of FPGA are introduced .

论文中首先讨论了DDRSDRAM的特性，DDR控制器的基本结构和时序，以及PCI总线的基本结构和时序，并介绍了FPGA的基本原理和开发过程。

DDR SDRAM ( Double Data Rate SDRAM , Double Data Rate Synchronous Dynamic Random Access Memory ) has been widely applied in these areas of demand for storage devices for its high-speed , large capacity and good compatibility .

DDRSDRAM（DoubleDataRateSDRAM，双倍数据率同步动态随机存储器）以其高速率、大容量和良好的兼容性在这些需求存储设备的领域得到了相当广泛的应用。

Through the high speed DDR SDRAM module at the hardware platform , we may improve the throughput of FPGA digital interface to satisfy the requirement of the high speed D / A convector for transmission rate of digital interface .

通过硬件平台上的高速DDRSDRAM模块，可以提高FPGA数据端口的吞吐量，满足高速D/A转换器对其数字接口传输速率的要求。

The B3G test tools implement high speed ( above gigabit bps ) data transmission using Aurora protocol of Xilinx . The B3G test tools save the high-speed data into DDR SDRAM and send the data to Personal Computer .

B3G测试工具基于Aurora协议实现了高速数据流（传输速率为Gbps）的传输，数据先保存在DDR内存中，再通过串口将数据传送到计算机上，以便对数据进行分析。

The representative application of the two-frame CTM is introduced predominantly , of which the implementation in circuit and the result are given with the Double Data Rate Synchronous Dynamic RAM ( DDR SDRAM ) served as the main memory .

重点介绍了两页式转置存储器结构的典型应用，给出了以双数据率同步动态内存（DDRSDRAM）作为主存储器构成的两页式转置存储器的电路结构和实现结果。

The method gives attention to the different characteristics of motion compensation module , deblock filter module ( or reconstruct module ) and display module , and enhances DDR SDRAM 's interface efficiency by fully reducing the time delay of non-read / write commands .

该方法兼顾运动补偿模块、去块效应滤波模块（或重建模块）和显示模块的不同需求特点，通过充分减少DDRSDRAM非读写命令的额外延时，达到较高的存储器接口效率。